In designing an electrical circuit layout, for example, on a multichip module (MCM), or printed wiring board (PWB), also known as printed circuit board (PCB), a major concern is excessive electric crosstalk incurred by the design of the layout. Crosstalk is unwanted noise passing between nearby conductors or transmission lines belonging to parts of the circuit that should be electrically isolated from each other. Beyond a tolerable level, crosstalk diminishes the quality and reliability and even destroys the functionality of the PWB or MCM, and the equipment in which it is installed. Two major causes of crosstalk are impedance mismatching and the too-close parallel coupling of conductors. In electrical applications including wireless applications which call for circuit miniaturization, the requirements of dense signal conductor routing, use of thin dielectric between layers, and high signal propagation speeds all compound the crosstalk problem.
General techniques for reducing crosstalk include using shielding conductors, spreading conductor paths by minimum distances, routing signals on additional layers, restricting parallelism, etc. However, such techniques usually incur a large layout area and additional shielding, thus undesirably increasing the product cost.
A particular technique for auditing and reducing crosstalk on a PCB circuit is disclosed in U.S. Pat. No. 5,502,644 issued Mar. 26, 1996 to Hamilton et al., which is hereby incorporated by reference. In accordance with the disclosed approach, after the PCB circuit is completely interconnected or routed by an interconnection router, crosstalk in electrical conductors in the circuit is audited or analyzed. In particular, the audit process defines conduction paths into conduction nets. These conduction nets are selected one at a time for a crosstalk analysis and simulated as an idle net carrying no voltage. Nearby conduction nets are simulated as driven nets carrying signals having a non-zero voltage. Crosstalk quantities are derived such as a coherent sum (CSUM), coherent/incoherent sum (CISUM), and incoherent sum (ISUM) for determining the crosstalk effect of the driven nets on the idle net. To reduce the crosstalk levels, conduction paths are manually edited by moving, shoving-aside and re-routing the paths. The corrected design is re-audited in accordance with the disclosed technique. This process continues until the crosstalk level in each net becomes acceptable. It is thus time consuming and labor intensive especially when the interconnection density is high, and a significant number of the nets have a crosstalk level above an acceptable limit.
Accordingly, it is desirable to have a methodology for efficiently rendering a layout of an electrical circuit, which is cost effective and well satisfies the crosstalk requirements.